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Mark Glasser’s Next Level Guidebook to Masterful Design with Universal Verification Methodology Set for Exhibit at Frankfurt Book Fair

When it comes to verification methodology and software engineering, Mark Glasser is a major thought leader who published definitive texts like “The OVM Cookbook.” Recently, he published an up-to-date guide for the next generation of verification engineers. Titled Next Level Testbenches: Design Patterns in SystemVerilog and UVM, it’s meant to help readers get a head start on the design of high quality testbenches. The book is set to be exhibited at the world-famous Frankfurt Book Fair.


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Classic software design patterns implemented in SystemVerilog

Given its size, the Frankfurt Book Fair isn’t just a place to discover exciting new novels or hear insights from best-selling motivational authors. The book fair will be exhibiting hundreds of textbooks, manuals, and other technical guides for a wide range of fields.

It is why one can even find the work of Mark Glasser, an expert Design Verification Engineer and Methodologist who has worked in the field for over 30 years. He is also the co-inventor of Open Verification Methodology (OVM) and Universal Verification Methodology (UVM). Both are vital components in modern semiconductor chip design processes. Glasser has extensively contributed to the field in his professional work and as an author. He also published “The OVM Cookbook,” a definitive text still used by many engineers.

For the Frankfurt Book Fair 2024, he will be exhibiting his newest book “Next Level Testbenches: Design Patterns in SystemVerilog and UVM,” an in-depth guide that seeks to help today’s engineers with the complex task of building testbenches for verifying semiconductor designs.

“Next Level Testbenches” views testbench construction from a software perspective, exploring classic software design patterns and how they work in SystemVerilog. It comes with fully working code examples for all these patterns and directs them to Topaz, a companion library that readers can easily access via GitHub.

For those who are seriously dedicated to becoming cutting-edge verification engineers, “Next Level Testbenches: Design Patterns in SystemVerilog and UVM” could become essential reading. Those who would like to check Mark Glasser’s work can easily find it at the self-publishing and book marketing company ReadersMagnet’s exhibit at stand 6.0 B11 during the Frankfurt Book Fair 2024. The book fair will occur on October 16-20, 2024, at Messe Frankfurt, Ludwig-Erhard-Anlage 1, 60327 Frankfurt am Main, Germany. Get a copy on Amazon.

“Next Level Testbenches: Design Patterns in SystemVerilog and UVM”
Author: Mark Glasser
Published date: July 29, 2024
Publisher: Self-Published
Genre: Technology

Author Bio
Mark Glasser is a Design Verification Engineer and Methodologist. He has been in the field for over three decades, working for electronic design automation (EDA) and semiconductor companies. Mark was part of the team that developed OVM and UVM and is the author of “The OVM Cookbook” (Springer 2009), the definitive text on OVM. In addition, he has written papers and articles on OVM, UVM, and related verification topics. Mark, his wife Janice, and their two cats live among the redwoods in the Santa Cruz Mountains in Soquel, California.
 


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